ReMIX Project     

A Reconfigurable Memory for Indexing Mass of Data      

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ACI ReMIX
      
ARC INRIA

Automatic Synthesis of Filter Operators

Most of the time, the critical part of a reconfigurable architecture concerns its programming facility. The remix FLASH memory is tightly connected to FPGA components housing application dependant hardware filters.

Specifying the filter functionality can be seen as a data flow description: data come as a regular flow from the ReMIX memory, and are processed on-the-fly. Only data meeting some requirements are pushed to the RMEM board output.

The GAUT synthesis tool developed by the ESTER laboratory, Lorient, appears as a good approach for simplying the filter design. From a high level description (C), a filtering process can be specify before generating an optimized VHDL code.

Results
From April 15th to October 15th 2006, H. Darolles, Master thesis, has been working on adapting the GAUT synthesis tool to ReMIX. Further developments on the GAUT system are needed to reach a fully operational synthesis tools. However, H. Darolles has developed a very usefull VHDL ReMIX simulation environment allowing new designers to be more efficient.

The objective of fully automate the design of new ReMIX hardware operators from a C-like description to an operational bitstream has not been reached. The main reason is that the GAUT tool, primarily designed for purely signal processing applications, need some adaptations to fit the genomic field. This research work was however very fruitfull for further collaboration, especially with the R2D2 team< to set new investigating path for automating the generation of VHDL operators.

  contact:

  Dominique Lavenier
  lavenier@irisa.fr

  http://www.irisa.fr/remix